Optimal Test Time for System-on-Chip Designs using Fuzzy Logic and Process Algebra

Abstract

Problem statement: Test scheduling is crucially important for optimal SoC test automation to allocate the limited available test resources. In this study we introduced a fuzzy based engine to allocate test resources. The minimized test application time can be achieved by test pipelining. However the test power consumption incurred during test procedure must be controlled in order not to offend the allowed maximal power dissipation thus avoiding damaging the system under test. Approach: Process algebra is the adept to deal with concurrent behaviors, based on this, the test scheduling scheme for SoC cores concurrent test is outlined by mapping the parallel test actions into concurrent processes. The algorithm for SoC test scheduling based on process algebra under multiple constraints (test power dissipation, test resources and test priorities) and apply a fuzzy based optimum search for a solution to the scheduling problem. Results: The test application time was calculated for three ITC-02 SOC benchmark circuits and the results were compared with other approaches. Conclusion: The results showed for ITC-02 benchmarks circuits prove the effectiveness of our proposed method.